Generally, nitride semiconductors are widely used for various optoelectronic devices because of their characteristics of having a wide band gap. Surfaces of p-type nitride semiconductors processed by etching or the like suffer damage because of the processing. Since the damage exhibits n-type conductivity, the processed p-type nitride semiconductors cannot achieve good ohmic current-voltage (I-V) characteristics even if ohmic electrodes are formed on the surfaces of the p-type nitride semiconductors (for example, refer to non-patent document 1, T. Makimoto, K. Kumakura, and N. Kobayashi, Journal of Crystal Growth 221, pp. 350-355, (2000); non-patent document 2, T. Makimoto, K. Kumakura, and N. Kobayashi, phys. stat. sol. (a) 188, No. 1, pp. 183-186, (2001)).
To reduce the effect of the damage, a method is reported of growing a new p-type semiconductor on the layer that suffers the damage. Here, studies concerning an npn-type nitride semiconductor heterojunction bipolar transistor (HBT) having a base layer consisting of a p-type nitride semiconductor will be mainly described.
FIGS. 9A-9E are views showing a typical process of fabricating an HBT: FIG. 9A shows crystal growth of the HBT structure; FIG. 9B shows surface exposure of the base layer by etching; FIG. 9C shows surface exposure of the sub-collector layer by etching; FIG. 9D shows forming of a p-type electrode on the base layer; and FIG. 9E shows forming of n-type electrodes on the emitter layer and sub-collector layer.
As shown FIG. 9A, the HBT structure has an n-type sub-collector layer 24, an n-type collector layer 23 stacked on the n-type sub-collector layer 24, a p-type InGaN base layer 22 stacked on the n-type collector layer 23, and an n-type GaN emitter layer 21 stacked on the p-type InGaN base layer 22. Subsequently, as shown in FIG. 9B, the surface exposure of the base layer 22 is carried out by etching. Then, as shown in FIG. 9C, the surface exposure of the n-type sub-collector layer 24 is carried out by etching. Subsequently, as shown in FIG. 9D, a p-type electrode (base electrode) 25 is formed on the base layer 22 whose surface is exposed. Finally, as shown in FIG. 9E, n-type electrodes 26 are formed on the emitter layer 21 and the n-type sub-collector layer 24 whose surface is exposed.
In the HBT fabrication process, the surface of the base layer 22 is exposed by removing the emitter layer 21 by etching to form the base electrode 25. The base electrode 25 is formed on the surface of the exposed base layer 22. Since the surface of the exposed base layer 22 suffers the etching damage, the base electrode does not exhibit good ohmic I-V characteristics, when the base layer 22 is p-type GaN. As a result, the fabricated HBT does not exhibit good common emitter I-V characteristics.
In other words, the conventional nitride HBT has the common emitter I-V characteristics that present a problem of having a small current gain and a high offset voltage. To reduce the effect of the damage of the surface of the base layer, several methods are reported of growing a new p-type semiconductor on the p-type nitride semiconductor base layer that suffers the damage.
The conventional methods will be described.
A first method of reducing the effect of the damage is that of regrowing a p-type GaN on the surface that suffers the damage (for example, see, non-patent document 3, L. S. McCarthy, P. Kozodoy, M. J. W. Rodwell, S. P. DenBaars, and U. K. Mishra, IEEE Electron Device Letters, Vol. 20, No. 6, pp. 277-279 (1999); or non-patent document 4, B. S. Shelton, D. J. H. Lambert, Jian Jang Huang, M. M. Wong, U. Chowdhury, Ting Gang Zhu, H. K. Kwon, Z. Liliental-Weber, M. Benarama, M. Feng, and R. D. Dupuis, IEEE Transactions on Electron Devices, Vol. 48, No. 3, pp. 490-494 (2001)).
FIG. 10 is a schematic view showing a conventional HBT structure that has a p-type GaN regrown on the p-type GaN base layer that suffers the etching damage, that is, a schematic view showing a conventional HBT structure that has a new p-type semiconductor grown on the p-type nitride semiconductor base layer. The HBT structure has an n-type GaN sub-collector layer 34, an n-type GaN collector layer 33 stacked on the n-type GaN sub-collector layer 34, a p-type GaN base layer 32 stacked on the n-type GaN collector layer, an n-type AlGaN emitter layer 31 stacked on the p-type GaN base layer 32, and an external regrown p-type GaN base layer 35 formed on the p-type GaN base layer 32 whose surface is exposed. In addition, the HBT structure has a collector electrode 37 formed on the n-type GaN sub-collector layer 34 whose surface is exposed, a base electrode 36 formed on the external regrown p-type GaN base layer 35, and an emitter electrode 38 formed on the n-type AlGaN emitter layer 31.
In spite of the regrowth of the base layer, however, none of the methods disclosed in the foregoing non-patent documents can achieve the HBT current gain larger than 10, which shows that a large gain cannot be achieved.
In addition, in the foregoing non-patent document 3, the offset voltage in the common emitter I-V characteristics is equal to or larger than 4 V. Furthermore, as for the foregoing non-patent document 4, the offset voltage cannot be determined because the common emitter I-V characteristics reported have a large leakage current.
As described above, the regrowth of the p-type GaN (sometimes referred to as an “external base layer”) on the base layer exposed by etching can little improve the HBT characteristics. The regrowth using the p-type GaN, a typical example of the p-type nitride semiconductors, is considered to be unable to improve the HBT characteristics because the process damage at the regrowth interface cannot be recovered. This teaches that a material to be regrown is important to fabricate good HBTs.
A second method regrows a p-type GaAs on the surface that suffers the damage instead of regrowing the p-type GaN (for example, refer to a non-patent document 5, K. P. Lee, A. P. Zhang, G. Dang, F. Ren, J. Han, S. N. G. Chu, W. S. Hobson, J. Lopata, C. R. Abernathy, S. J. Pearton, and J. W. Lee, Solid-State Electronics 45, pp. 243-247 (2001)). The hole concentration of the p-type GaAs is 1020 cm−3, which is 100 times or more higher than the hole concentration of the p-type GaN in the room temperature. The document 5 is a report that pays attention to such a high hole concentration to achieve the good HBT characteristics.
The regrowth of the p-type GaAs, however, cannot achieve the current gain larger than 5 and the offset voltage less than 3.5 V in the common emitter I-V characteristics, thereby being unable to achieve the good HBT characteristics. In this case also, the HBT characteristics are considered to be unimproved because the process damage between the p-type GaN base layer and the p-type GaAs grown layer has not been repaired. This teaches that a good HBT cannot be fabricated by only increasing the hole concentration of the layer regrown on the p-type GaN that suffers the process damage.
As relevant patent documents, Japanese patent application laid-open Nos. 5-175225 (1993) and 5-291282 (1993) are known. The documents disclose a technique that regrows a p-type GaAs external base layer on an AlGaAs external emitter layer whose resistance is increased, to reduce the junction capacitance. In addition, Japanese patent application laid-open No. 7-245316 (1995) discloses a device that has a p-type GaAs external base layer on an n-type GaAs collector layer via an n-type InGaP etching stopper layer.
The present invention is implemented to solve the foregoing problems. Therefore it is an object of the present invention to provide a p-type nitride semiconductor structure capable of forming a good ohmic electrode by solving a problem in that it is difficult to form the good ohmic electrode on the surface of the p-type nitride semiconductor processed.
Another object of the present invention is to provide a p-type nitride semiconductor bipolar transistor having a greatly improved current gain by solving a problem in that the conventional p-type nitride semiconductor bipolar transistors have a current gain much smaller than the current gain of the bipolar transistors fabricated from other semiconductors.
Still another object of the present invention is to provide a p-type nitride semiconductor bipolar transistor capable of reducing the offset voltage to a value close to the value expected from the band gaps of emitter and base materials by solving a problem in that the conventional p-type nitride semiconductor bipolar transistor has a offset voltage much larger than the value expected from the band gaps.